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 HD74HCT240
Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)
REJ03D0662-0200 (Previous ADE-205-550) Rev.2.00 Mar 30, 2006
Description
The HD74HCT240 is an inverting buffer and has two active low enables (1G and 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs.
Features
* * * * * * * LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 11 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information
Part Name HD74HCT240P HD74HCT240FPEL HD74HCT240RPEL Package Type DILP-20 pin SOP-20 pin (JEITA) SOP-20 pin (JEDEC) Package Code (Previous Code) PRDP0020AC-B (DP-20NEV) PRSP0020DD-B (FP-20DAV) P FP Package Abbreviation Taping Abbreviation (Quantity) -- EL (2,000 pcs/reel) EL (1,000 pcs/reel) ELL (2,000 pcs/reel)
PRSP0020DC-A RP (FP-20DBV) PTSP0020JB-A HD74HCT240TELL TSSOP-20 pin T (TTP-20DAV) Note: Please consult the sales office for the above package availability.
Function Table
Inputs G H L L H L X Z : : : : high level low level irrelevant off (high-impedance) state of a 3-state output A X H L Output Y Z L H
Rev.2.00 Mar 30, 2006 page 1 of 6
HD74HCT240
Pin Arrangement
1G 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 1 2 3 4 5 6 7 8 9 20 VCC 19 2G 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 2A1 (Top view)
GND 10
Logic Diagram
To three other Inverters VCC Input A Y One of 8 Inverters
Strobe G
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IO ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 35 75 500 -65 to +150 Unit V V mA mA mA mW
C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Rev.2.00 Mar 30, 2006 page 2 of 6
HD74HCT240
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time*1 Symbol VCC VIN, VOUT Ta tr, tf Ratings 4.5 to 5.5 0 to VCC -40 to 85 0 to 500 Unit V V Conditions
C
ns VCC = 4.5 V
Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item Input voltage Output voltage Symbol VCC (V) VIH VIL VOH VOL Off-state output current Input current Quiescent current IOZ Iin ICC Min 4.5 to 5.5 2.0 4.5 to 5.5 -- 4.5 4.4 4.5 4.18 4.5 -- 4.5 -- 5.5 5.5 5.5 -- -- -- Ta = 25C Typ Max -- -- -- 0.8 -- -- -- -- -- 0.1 -- 0.26 -- -- -- 0.5 0.1 4.0 Ta = -40 to+85C Min Max 2.0 -- -- 0.8 4.4 -- 4.13 -- -- 0.1 -- 0.33 -- -- -- 5.0 1.0 40 Unit V V V V A A A Test Conditions
Vin = VIH or VIL IOH = -20 A IOH = -6 mA Vin = VIH or VIL IOL = 20 A IOL = 6 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 A
Switching Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item Propagation delay time Output enable time Output disable time Output rise/fall time Input capacitance Symbol VCC (V) tPHL tPLH tZL tZH tLZ tHZ tTLH tTHL Cin 4.5 4.5 4.5 4.5 4.5 4.5 4.5 -- Min -- -- -- -- -- -- -- -- Ta = 25C Typ Max 13 20 9 20 14 30 12 30 14 30 18 30 4 5 12 10 Ta = -40 to +85C Min Max -- 25 -- 25 -- 38 -- 38 -- 38 -- 38 -- -- 15 10 Unit ns ns ns ns pF Test Conditions
Rev.2.00 Mar 30, 2006 page 3 of 6
HD74HCT240
Test Circuit
VCC VCC Output 1 k 1Y1 to 2Y4 1A1 to 2A4 CL = 50 pF S1 OPEN GND VCC
1G, 2G
See Function Table
Input Pulse Generator Zout = 50
TEST tPLH / tPHL tZH / tHZ tZL / tLZ
S1 OPEN GND VCC
Note : 1. CL includes probe and jig capacitance.
Waveforms
* Waveform - 1
90 % 1.3 V 10 % tPLH 10 % tPHL 90 % Output Y 1.3 V 10 % tTLH 90 % 1.3 V 10 % tTHL tf tr 90 % 1.3 V VCC 0V
Input A
VOH VOL
* Waveform - 2
90 % Input G
tf
tr 90 % 1.3 V 10 % tLZ VCC 0V VOH
1.3 V 10 % tZL
Waveform - A tZH Waveform - B
1.3 V 10 % tHZ 90 % VOL VOH VOL
1.3 V
Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns 2. Waveform- A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform- B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 4 of 6
HD74HCT240
Package Dimensions
JEITA Package Code P-DIP20-6.3x24.5-2.54 RENESAS Code PRDP0020AC-B Previous Code DP-20NEV MASS[Typ.] 1.26g
D
20
11
1 0.89 b3
10
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 24.50 25.40 6.30 7.00 5.08
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.27 2.54
JEITA Package Code P-SOP20-5.5x12.6-1.27
RENESAS Code PRSP0020DD-B
Previous Code FP-20DAV
MASS[Typ.] 0.31g
*1
D 11
F
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
10 bp x M L1
c
Reference Dimension in Millimeters Symbol
y
A1
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.60 13.0 5.50
0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15
Rev.2.00 Mar 30, 2006 page 5 of 6
A
HD74HCT240
JEITA Package Code P-SOP20-7.5x12.8-1.27 RENESAS Code PRSP0020DC-A Previous Code FP-20DBV MASS[Typ.] 0.52g
*1
D
F 11
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET.
bp
HE E
*2
Index mark
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
c
Reference Dimension in Millimeters Symbol
10 bp x M L1
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.80 13.2 7.50
0.10 0.20 0.30 2.65 0.34 0.40 0.46 0.20 0.25 0.30 0 8 10.00 10.40 10.65 1.27 0.12 0.15 0.935 0.40 0.70 1.27 1.45
JEITA Package Code P-TSSOP20-4.4x6.5-0.65
RENESAS Code PTSP0020JB-A
Previous Code TTP-20DAV
MASS[Typ.] 0.07g
*1
D F 11
A
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
*2
E
Index mark
Terminal cross section ( Ni/Pd/Au plating )
Reference Dimension in Millimeters Symbol
c
1 Z e
*3
10 bp L1 x M
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 6.50 6.80 4.40
0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0 8 6.20 6.40 6.60 0.65 0.13 0.10 0.65 0.4 0.5 0.6 1.0
Rev.2.00 Mar 30, 2006 page 6 of 6
A
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
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1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
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Colophon .6.0


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